When writing and reading data to and from a NAND flash memory, it is required to first charge a bit line with a voltage.
However, a current, which flows to the bit line, has a waveform having a high peak (hereinafter, a peak current) with increase in voltage of the bit line by a sense amplifier. Because of this, a voltage in an input/output buffer connected to the sense amplifier for inputting and outputting the data at a high clock rate decreases, so that operation is unstable when inputting the data from outside or when outputting the data outside.
Further, for a device using the NAND flash memory, noise generated by the current, which flows to the bit line, deteriorates the operational reliability.
When making the increase in the current, which flows to the bit line, slower in order to inhibit the noise and the above-described decrease in voltage, there is a problem that high-speed operation cannot be realized.